********** Mapped Logic ********** |
$OpTx$BIN_OR$350 <= ((NOT use_cart_logic/cfg_mode(4) AND
use_cart_logic/cfg_mode(0) AND adr(3) AND reset_n_sync AND use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_bank(16) AND reset_n_sync AND NOT use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/cfg_bank_13_and0008/use_cart_logic/cfg_bank_13_and0008_D2 AND NOT use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (NOT use_cart_logic/cfg_mode(4) AND NOT use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(3) AND adr(3) AND NOT adr(7) AND NOT cctl AND reset_n_sync AND use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2 AND use_cart_logic/N26/use_cart_logic/N26_D2 AND $OpTx$FX_DC$22) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1) AND NOT adr(7) AND NOT rw AND data(2).PIN AND NOT cctl AND reset_n_sync AND $OpTx$FX_DC$22) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND adr(2) AND reset_n_sync AND use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(1) AND NOT rw AND NOT cctl AND data(3).PIN AND reset_n_sync AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (NOT use_cart_logic/cfg_mode(1) AND NOT rw AND NOT cctl AND data(3).PIN AND reset_n_sync AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT rw AND NOT cctl AND data(3).PIN AND reset_n_sync AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/N26/use_cart_logic/N26_D2 AND NOT $OpTx$FX_DC$22) OR (use_cart_logic/cfg_mode(3) AND use_cart_logic/cfg_bank(16) AND rw AND reset_n_sync) OR (NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_bank(16) AND rw AND reset_n_sync) OR (use_cart_logic/cfg_bank(16) AND rw AND reset_n_sync AND use_cart_logic/N26/use_cart_logic/N26_D2 AND NOT $OpTx$FX_DC$22) OR (NOT use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_bank(16) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/N26/use_cart_logic/N26_D2 AND NOT $OpTx$FX_DC$22) OR (use_cart_logic/cfg_mode(0) AND use_cart_logic/cfg_mode(1) AND NOT rw AND data(2).PIN AND reset_n_sync AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2)); |
$OpTx$BIN_STEP$349 <= ((NOT rw AND data(0).PIN AND reset_n_sync AND
use_cart_logic/cfg_bank_13_and0008/use_cart_logic/cfg_bank_13_and0008_D2) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_bank(13) AND reset_n_sync AND NOT use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/cfg_bank_13_and0008/use_cart_logic/cfg_bank_13_and0008_D2) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND NOT rw AND data(0).PIN AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT $OpTx$FX_DC$23) OR (NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(3) AND NOT adr(0) AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND $OpTx$INV$2) OR (NOT adr(6) AND adr(7) AND NOT rw AND NOT cctl AND data(0).PIN AND reset_n_sync AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (adr(5) AND NOT $OpTx$INV$2 AND $OpTx$FX_DC$33) OR (NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(3) AND NOT $OpTx$INV$2 AND $OpTx$FX_DC$43) OR (NOT use_cart_logic/cfg_mode(3) AND adr(4) AND use_cart_logic/N26/use_cart_logic/N26_D2 AND $OpTx$FX_DC$33) OR (use_cart_logic/cfg_bank(13) AND adr(7) AND NOT $OpTx$INV$2 AND $OpTx$FX_DC$35) OR (adr(0) AND reset_n_sync AND $OpTx$FX_DC$36 AND $OpTx$FX_DC$30) OR (use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(0) AND $OpTx$FX_DC$43) OR (use_cart_logic/cfg_mode(2) AND adr(4) AND $OpTx$FX_DC$43) OR (NOT use_cart_logic/cfg_mode(3) AND adr(7) AND $OpTx$FX_DC$33) OR (adr(6) AND NOT $OpTx$INV$2 AND $OpTx$FX_DC$33) OR (reset_n_sync AND NOT $OpTx$FX_DC$36 AND $OpTx$FX_DC$9)); |
$OpTx$FX_DC$107 <= ((rw AND reset_n_sync AND
use_cart_logic/N145/use_cart_logic/N145_D2) OR (use_cart_logic/cfg_mode(4) AND NOT use_cart_logic/cfg_mode(5) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_mode(4) AND reset_n_sync AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (NOT use_cart_logic/cfg_mode(4) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/N145/use_cart_logic/N145_D2) OR (NOT use_cart_logic/cfg_mode(4) AND reset_n_sync AND NOT $OpTx$FX_DC$36 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/cfg_bank_13_and0008/use_cart_logic/cfg_bank_13_and0008_D2 AND NOT use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2)); |
$OpTx$FX_DC$124 <= (NOT use_cart_logic/cfg_mode(4) AND
use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(3) AND use_cart_logic/cfg_mode(0) AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2 AND $OpTx$FX_DC$23); |
$OpTx$FX_DC$137 <= (use_cart_logic/cfg_mode(3) AND adr(3)); |
$OpTx$FX_DC$158 <= ((use_cart_logic/cfg_mode(3))
OR (adr(7) AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(0) AND adr(5))); |
$OpTx$FX_DC$19 <= (NOT use_cart_logic/cfg_mode(4) AND
use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(3) AND NOT s4 AND NOT use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2 AND $OpTx$FX_DC$7); |
$OpTx$FX_DC$22 <= (NOT adr(6) AND NOT adr(5) AND NOT adr(4)); |
$OpTx$FX_DC$23 <= (use_cart_logic/cfg_mode(2) AND
use_cart_logic/cfg_mode(1)); |
$OpTx$FX_DC$30 <= ((NOT use_cart_logic/cfg_mode(3) AND
use_cart_logic/cfg_mode(1) AND NOT adr(7) AND NOT cctl AND use_cart_logic/N26/use_cart_logic/N26_D2 AND $OpTx$FX_DC$22) OR (use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2) OR (use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(0) AND NOT adr(7) AND NOT cctl AND $OpTx$FX_DC$22)); |
$OpTx$FX_DC$33 <= ((reset_n_sync AND $OpTx$FX_DC$9)
OR (use_cart_logic/cfg_bank(13) AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2)); |
$OpTx$FX_DC$35 <= ((rw AND reset_n_sync)
OR (reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2)); |
$OpTx$FX_DC$36 <= (NOT use_cart_logic/cfg_mode(4) AND
use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2); |
$OpTx$FX_DC$42 <= ((NOT use_cart_logic/cfg_enable AND rw)
OR (NOT rw AND $OpTx$INV$3)); |
$OpTx$FX_DC$43 <= ((reset_n_sync AND $OpTx$FX_DC$9)
OR (use_cart_logic/cfg_bank(13) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/N26/use_cart_logic/N26_D2)); |
$OpTx$FX_DC$56 <= (NOT adr(6) AND NOT adr(7)); |
$OpTx$FX_DC$6 <= (NOT adr(3) AND NOT rw AND NOT cctl AND
use_cart_logic/N230/use_cart_logic/N230_D2); |
$OpTx$FX_DC$7 <= (NOT use_cart_logic/cfg_mode(2) AND
NOT use_cart_logic/cfg_mode(0)); |
$OpTx$FX_DC$70 <= ((NOT rw AND reset_n_sync AND
use_cart_logic/cfg_bank_13_and0008/use_cart_logic/cfg_bank_13_and0008_D2) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(1) AND NOT rw AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT rw AND NOT cctl AND reset_n_sync AND NOT $OpTx$FX_DC$36 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2)); |
$OpTx$FX_DC$71 <= ((NOT use_cart_logic/cfg_mode(4) AND
use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(1) AND NOT use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2)); |
$OpTx$FX_DC$84 <= ((NOT use_cart_logic/cfg_mode(2) AND NOT rw AND NOT cctl AND
reset_n_sync AND NOT $OpTx$FX_DC$36 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (NOT rw AND NOT cctl AND reset_n_sync AND NOT $OpTx$FX_DC$36 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(1) AND NOT rw AND NOT cctl AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (NOT rw AND NOT cctl AND reset_n_sync AND $OpTx$FX_DC$36 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/N26/use_cart_logic/N26_D2)); |
$OpTx$FX_DC$9 <= ((use_cart_logic/cfg_bank(13) AND rw)
OR (NOT rw AND NOT cctl AND data(0).PIN AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2)); |
$OpTx$FX_SC$112 <= ((cctl AND reset_n_sync)
OR (rw AND reset_n_sync AND NOT $OpTx$FX_DC$36)); |
$OpTx$INV$2 <= ((use_cart_logic/cfg_mode(0) AND
use_cart_logic/cfg_mode(1)) OR (use_cart_logic/cfg_mode(0) AND adr(6) AND adr(7) AND NOT adr(5) AND adr(4)) OR (use_cart_logic/cfg_mode(1) AND adr(6) AND NOT adr(7) AND adr(5) AND adr(4)) OR (NOT use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1) AND adr(6) AND adr(7) AND adr(5) AND NOT adr(4))); |
$OpTx$INV$3 <= ((NOT use_cart_logic/cfg_enable AND adr(1) AND adr(0))
OR (NOT adr(6) AND NOT adr(3) AND adr(7) AND adr(5) AND adr(1) AND NOT adr(2) AND NOT adr(0) AND NOT adr(4) AND NOT data(0).PIN) OR (NOT use_cart_logic/cfg_enable AND adr(2)) OR (NOT use_cart_logic/cfg_enable AND adr(6)) OR (NOT use_cart_logic/cfg_enable AND adr(3)) OR (NOT use_cart_logic/cfg_enable AND NOT adr(7)) OR (NOT use_cart_logic/cfg_enable AND NOT adr(5)) OR (NOT use_cart_logic/cfg_enable AND adr(4))); |
data_I(0) <= ((use_cart_logic/cfg_mode(0) AND adr(1) AND adr(2) AND
NOT adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank2(13) AND adr(1) AND NOT adr(2) AND adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank2(21) AND NOT adr(1) AND adr(2) AND NOT adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank(21) AND NOT adr(1) AND NOT adr(2) AND adr(0) AND data_or0000/data_or0000_D2) OR (adr(1) AND adr(2) AND adr(0) AND NOT mod_en AND data_or0000/data_or0000_D2) OR (ram_rom_data(0).PIN AND NOT data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank(13) AND data_or0000/data_or0000_D2 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_enable AND adr(1) AND NOT adr(2) AND NOT adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_enable2 AND NOT adr(1) AND adr(2) AND adr(0) AND data_or0000/data_or0000_D2)); data(0) <= data_I(0) when data_OE(0) = '1' else 'Z'; data_OE(0) <= data_1_IOBUFE/data_1_IOBUFE_TRST; |
data_I(1) <= ((use_cart_logic/cfg_mode(1) AND adr(1) AND adr(2) AND
NOT adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank2(14) AND adr(1) AND NOT adr(2) AND adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_source_ram AND adr(1) AND adr(2) AND adr(0) AND data_or0000/data_or0000_D2) OR (ram_rom_data(1).PIN AND NOT data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank(14) AND data_or0000/data_or0000_D2 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_bank2(22) AND NOT adr(1) AND adr(2) AND NOT adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank(22) AND NOT adr(1) AND NOT adr(2) AND adr(0) AND data_or0000/data_or0000_D2)); data(1) <= data_I(1) when data_OE(1) = '1' else 'Z'; data_OE(1) <= data_1_IOBUFE/data_1_IOBUFE_TRST; |
data_I(2) <= ((use_cart_logic/cfg_mode(2) AND adr(1) AND adr(2) AND
NOT adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank2(15) AND adr(1) AND NOT adr(2) AND adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_write_enable2 AND adr(1) AND adr(2) AND adr(0) AND data_or0000/data_or0000_D2) OR (ram_rom_data(2).PIN AND NOT data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank(15) AND data_or0000/data_or0000_D2 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_bank2(23) AND NOT adr(1) AND adr(2) AND NOT adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank(23) AND NOT adr(1) AND NOT adr(2) AND adr(0) AND data_or0000/data_or0000_D2)); data(2) <= data_I(2) when data_OE(2) = '1' else 'Z'; data_OE(2) <= data_1_IOBUFE/data_1_IOBUFE_TRST; |
data_I(3) <= ((use_cart_logic/cfg_mode(3) AND adr(1) AND adr(2) AND
NOT adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank2(16) AND adr(1) AND NOT adr(2) AND adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_source_ram2 AND adr(1) AND adr(2) AND adr(0) AND data_or0000/data_or0000_D2) OR (ram_rom_data(3).PIN AND NOT data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank(16) AND data_or0000/data_or0000_D2 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_bank2(24) AND NOT adr(1) AND adr(2) AND NOT adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank(24) AND NOT adr(1) AND NOT adr(2) AND adr(0) AND data_or0000/data_or0000_D2)); data(3) <= data_I(3) when data_OE(3) = '1' else 'Z'; data_OE(3) <= data_1_IOBUFE/data_1_IOBUFE_TRST; |
data_I(4) <= ((use_cart_logic/cfg_mode(4) AND adr(1) AND adr(2) AND
NOT adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank2(17) AND adr(1) AND NOT adr(2) AND adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank2(25) AND NOT adr(1) AND adr(2) AND NOT adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank(25) AND NOT adr(1) AND NOT adr(2) AND adr(0) AND data_or0000/data_or0000_D2) OR (ram_rom_data(4).PIN AND NOT data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank(17) AND data_or0000/data_or0000_D2 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2)); data(4) <= data_I(4) when data_OE(4) = '1' else 'Z'; data_OE(4) <= data_1_IOBUFE/data_1_IOBUFE_TRST; |
data_I(5) <= ((use_cart_logic/cfg_mode(5) AND adr(1) AND adr(2) AND
NOT adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank2(18) AND adr(1) AND NOT adr(2) AND adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank2(26) AND NOT adr(1) AND adr(2) AND NOT adr(0) AND data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank(26) AND NOT adr(1) AND NOT adr(2) AND adr(0) AND data_or0000/data_or0000_D2) OR (ram_rom_data(5).PIN AND NOT data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank(18) AND data_or0000/data_or0000_D2 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2)); data(5) <= data_I(5) when data_OE(5) = '1' else 'Z'; data_OE(5) <= data_1_IOBUFE/data_1_IOBUFE_TRST; |
data_I(6) <= ((ram_rom_data(6).PIN AND NOT data_or0000/data_or0000_D2)
OR (use_cart_logic/cfg_bank(19) AND data_or0000/data_or0000_D2 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_bank2(19) AND adr(1) AND NOT adr(2) AND adr(0) AND data_or0000/data_or0000_D2)); data(6) <= data_I(6) when data_OE(6) = '1' else 'Z'; data_OE(6) <= data_1_IOBUFE/data_1_IOBUFE_TRST; |
data_I(7) <= ((use_cart_logic/cfg_bank2(20) AND adr(1) AND NOT adr(2) AND
adr(0) AND data_or0000/data_or0000_D2) OR (ram_rom_data(7).PIN AND NOT data_or0000/data_or0000_D2) OR (use_cart_logic/cfg_bank(20) AND data_or0000/data_or0000_D2 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (adr(3) AND eeprom_so AND data_or0000/data_or0000_D2)); data(7) <= data_I(7) when data_OE(7) = '1' else 'Z'; data_OE(7) <= data_1_IOBUFE/data_1_IOBUFE_TRST; |
data_1_IOBUFE/data_1_IOBUFE_TRST <= ((data_or0000/data_or0000_D2)
OR (NOT s4 AND rw AND rd4) OR (rw AND NOT s5 AND rd5 AND use_cart_logic/N19/use_cart_logic/N19_D2)); |
data_or0000/data_or0000_D2 <= ((NOT adr(3) AND rw AND NOT cctl AND
use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT adr(1) AND NOT adr(2) AND rw AND NOT adr(0) AND NOT cctl AND use_cart_logic/N230/use_cart_logic/N230_D2)); |
FTCPE_eeprom_cs: FTCPE port map (eeprom_cs,eeprom_cs_T,NOT phi2short,'0','0');
eeprom_cs_T <= ((adr(3) AND NOT adr(1) AND NOT adr(2) AND NOT rw AND NOT adr(0) AND NOT cctl AND eeprom_cs AND NOT data(1).PIN AND reset_n AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (adr(3) AND NOT adr(1) AND NOT adr(2) AND NOT rw AND NOT adr(0) AND NOT cctl AND eeprom_cs AND reset_n AND use_cart_logic/N230/use_cart_logic/N230_D2 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (NOT eeprom_cs AND NOT reset_n) OR (NOT adr(1) AND NOT adr(2) AND NOT rw AND NOT adr(0) AND NOT cctl AND NOT eeprom_cs AND data(1).PIN AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2)); |
FTCPE_eeprom_sck: FTCPE port map (eeprom_sck,eeprom_sck_T,NOT phi2short,'0','0');
eeprom_sck_T <= ((adr(3) AND NOT adr(1) AND NOT adr(2) AND NOT rw AND NOT adr(0) AND NOT cctl AND eeprom_sck AND NOT data(0).PIN AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (adr(3) AND NOT adr(1) AND NOT adr(2) AND NOT rw AND NOT adr(0) AND NOT cctl AND eeprom_sck AND use_cart_logic/N230/use_cart_logic/N230_D2 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (NOT adr(1) AND NOT adr(2) AND NOT rw AND NOT adr(0) AND NOT cctl AND NOT eeprom_sck AND data(0).PIN AND reset_n AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (eeprom_sck AND NOT reset_n)); |
FTCPE_eeprom_si: FTCPE port map (eeprom_si,eeprom_si_T,NOT phi2short,'0','0');
eeprom_si_T <= ((adr(3) AND NOT adr(1) AND NOT adr(2) AND NOT rw AND NOT adr(0) AND NOT cctl AND eeprom_si AND NOT data(7).PIN AND reset_n AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (adr(3) AND NOT adr(1) AND NOT adr(2) AND NOT rw AND NOT adr(0) AND NOT cctl AND eeprom_si AND reset_n AND use_cart_logic/N230/use_cart_logic/N230_D2 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (NOT eeprom_si AND NOT reset_n) OR (NOT adr(1) AND NOT adr(2) AND NOT rw AND NOT adr(0) AND NOT cctl AND NOT eeprom_si AND data(7).PIN AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2)); |
FDCPE_mod_en: FDCPE port map (mod_en,mod_en_D,NOT phi2short,'0','0');
mod_en_D <= ((NOT reset_n_sync) OR (NOT adr(0) AND mod_en) OR (mod_en AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND adr(1) AND adr(2) AND adr(0) AND NOT cctl AND NOT data(0).PIN AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT adr(1) AND mod_en) OR (NOT adr(2) AND mod_en)); |
ram_ce <= NOT (((use_cart_logic/cfg_source_ram AND rw AND NOT s5 AND rd5 AND
use_cart_logic/N19/use_cart_logic/N19_D2) OR (use_cart_logic/cfg_source_ram AND NOT s5 AND rd5 AND NOT mod_en AND use_cart_logic/N19/use_cart_logic/N19_D2) OR (use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND NOT s4 AND use_cart_logic/cfg_source_ram2 AND use_cart_logic/cfg_write_enable2 AND rd4 AND NOT use_cart_logic/N19/use_cart_logic/N19_D2) OR (use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND NOT s4 AND use_cart_logic/cfg_source_ram2 AND rw AND rd4 AND NOT use_cart_logic/N19/use_cart_logic/N19_D2) OR (NOT s4 AND use_cart_logic/cfg_source_ram AND rw AND rd4 AND use_cart_logic/N19/use_cart_logic/N19_D2) OR (NOT s4 AND use_cart_logic/cfg_source_ram AND rd4 AND NOT mod_en AND use_cart_logic/N19/use_cart_logic/N19_D2))); |
ram_rom_adr(0) <= adr(0); |
ram_rom_adr(1) <= adr(1); |
ram_rom_adr(2) <= adr(2); |
ram_rom_adr(3) <= adr(3); |
ram_rom_adr(4) <= adr(4); |
ram_rom_adr(5) <= adr(5); |
ram_rom_adr(6) <= adr(6); |
ram_rom_adr(7) <= adr(7); |
ram_rom_adr(8) <= adr(8); |
ram_rom_adr(9) <= adr(9); |
ram_rom_adr(10) <= adr(10); |
ram_rom_adr(11) <= adr(11); |
ram_rom_adr(12) <= ((use_cart_logic/cfg_mode(3) AND adr(12))
OR (use_cart_logic/cfg_mode(1) AND adr(12)) OR (adr(12) AND NOT $OpTx$FX_DC$36) OR (NOT use_cart_logic/oss_bank(0) AND NOT use_cart_logic/oss_bank(1) AND adr(12)) OR (use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(3) AND use_cart_logic/oss_bank(0) AND NOT adr(12) AND $OpTx$FX_DC$36)); |
ram_rom_adr(13) <= ((NOT use_cart_logic/cfg_mode(5) AND
use_cart_logic/cfg_mode(3) AND use_cart_logic/cfg_bank(13)) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(3) AND s4) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND s4 AND use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2) OR (NOT use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_bank(13) AND NOT use_cart_logic/oss_bank(0) AND NOT use_cart_logic/oss_bank(1)) OR (use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_bank2(13) AND NOT use_cart_logic/N19/use_cart_logic/N19_D2) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND s4 AND use_cart_logic/N19/use_cart_logic/N19_D2 AND NOT $OpTx$FX_DC$7) OR (use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(0) AND use_cart_logic/oss_bank(1) AND NOT adr(12) AND use_cart_logic/N19/use_cart_logic/N19_D2 AND use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_bank(13)) OR (use_cart_logic/cfg_mode(4) AND NOT s5 AND use_cart_logic/N19/use_cart_logic/N19_D2) OR (NOT use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_bank(13)) OR (use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_bank(13) AND NOT use_cart_logic/N19/use_cart_logic/N19_D2) OR (s4 AND use_cart_logic/cfg_bank(13) AND NOT use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2)); |
ram_rom_adr(14) <= ((use_cart_logic/cfg_mode(4) AND
use_cart_logic/cfg_mode(5) AND NOT s5 AND NOT $OpTx$FX_DC$23) OR (use_cart_logic/cfg_bank(14) AND NOT $OpTx$FX_DC$19) OR (use_cart_logic/cfg_bank2(14) AND $OpTx$FX_DC$19)); |
ram_rom_adr(15) <= ((NOT use_cart_logic/cfg_mode(5) AND
use_cart_logic/cfg_bank(15)) OR (use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_bank(15)) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(1) AND NOT s5 AND use_cart_logic/N19/use_cart_logic/N19_D2) OR (use_cart_logic/cfg_mode(4) AND NOT s5 AND use_cart_logic/N19/use_cart_logic/N19_D2 AND NOT $OpTx$FX_DC$7) OR (use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_bank2(15) AND NOT use_cart_logic/N19/use_cart_logic/N19_D2) OR (use_cart_logic/cfg_bank(15) AND use_cart_logic/N19/use_cart_logic/N19_D2)); |
ram_rom_adr(16) <= ((use_cart_logic/cfg_bank(16) AND NOT $OpTx$FX_DC$19)
OR (use_cart_logic/cfg_bank2(16) AND $OpTx$FX_DC$19) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(1) AND NOT s5) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(1) AND NOT s5)); |
ram_rom_adr(17) <= ((use_cart_logic/cfg_bank(17) AND NOT $OpTx$FX_DC$19)
OR (use_cart_logic/cfg_bank2(17) AND $OpTx$FX_DC$19) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(1) AND NOT s5) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(0) AND use_cart_logic/cfg_mode(1) AND NOT s5)); |
ram_rom_adr(18) <= ((use_cart_logic/cfg_bank(18) AND NOT $OpTx$FX_DC$19)
OR (use_cart_logic/cfg_bank2(18) AND $OpTx$FX_DC$19) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(1) AND NOT s5)); |
ram_rom_adr(19) <= ((use_cart_logic/cfg_bank(19) AND NOT $OpTx$FX_DC$19)
OR (use_cart_logic/cfg_bank2(19) AND $OpTx$FX_DC$19) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1) AND NOT s5)); |
ram_rom_adr(20) <= ((use_cart_logic/cfg_bank(20) AND NOT $OpTx$FX_DC$19)
OR (use_cart_logic/cfg_bank2(20) AND $OpTx$FX_DC$19)); |
ram_rom_adr(21) <= ((use_cart_logic/cfg_bank2(21) AND $OpTx$FX_DC$19)
OR (use_cart_logic/cfg_bank(21) AND NOT $OpTx$FX_DC$19)); |
ram_rom_adr(22) <= ((use_cart_logic/cfg_bank2(22) AND $OpTx$FX_DC$19)
OR (use_cart_logic/cfg_bank(22) AND NOT $OpTx$FX_DC$19)); |
ram_rom_adr(23) <= ((use_cart_logic/cfg_bank2(23) AND $OpTx$FX_DC$19)
OR (use_cart_logic/cfg_bank(23) AND NOT $OpTx$FX_DC$19)); |
ram_rom_adr(24) <= ((use_cart_logic/cfg_bank2(24) AND $OpTx$FX_DC$19)
OR (use_cart_logic/cfg_bank(24) AND NOT $OpTx$FX_DC$19)); |
ram_rom_adr(25) <= ((use_cart_logic/cfg_bank2(25) AND $OpTx$FX_DC$19)
OR (use_cart_logic/cfg_bank(25) AND NOT $OpTx$FX_DC$19)); |
ram_rom_adr(26) <= ((use_cart_logic/cfg_bank2(26) AND $OpTx$FX_DC$19)
OR (use_cart_logic/cfg_bank(26) AND NOT $OpTx$FX_DC$19)); |
ram_rom_data_I(0) <= data(0).PIN;
ram_rom_data(0) <= ram_rom_data_I(0) when ram_rom_data_OE(0) = '1' else 'Z'; ram_rom_data_OE(0) <= NOT rw; |
ram_rom_data_I(1) <= data(1).PIN;
ram_rom_data(1) <= ram_rom_data_I(1) when ram_rom_data_OE(1) = '1' else 'Z'; ram_rom_data_OE(1) <= NOT rw; |
ram_rom_data_I(2) <= data(2).PIN;
ram_rom_data(2) <= ram_rom_data_I(2) when ram_rom_data_OE(2) = '1' else 'Z'; ram_rom_data_OE(2) <= NOT rw; |
ram_rom_data_I(3) <= data(3).PIN;
ram_rom_data(3) <= ram_rom_data_I(3) when ram_rom_data_OE(3) = '1' else 'Z'; ram_rom_data_OE(3) <= NOT rw; |
ram_rom_data_I(4) <= data(4).PIN;
ram_rom_data(4) <= ram_rom_data_I(4) when ram_rom_data_OE(4) = '1' else 'Z'; ram_rom_data_OE(4) <= NOT rw; |
ram_rom_data_I(5) <= data(5).PIN;
ram_rom_data(5) <= ram_rom_data_I(5) when ram_rom_data_OE(5) = '1' else 'Z'; ram_rom_data_OE(5) <= NOT rw; |
ram_rom_data_I(6) <= data(6).PIN;
ram_rom_data(6) <= ram_rom_data_I(6) when ram_rom_data_OE(6) = '1' else 'Z'; ram_rom_data_OE(6) <= NOT rw; |
ram_rom_data_I(7) <= data(7).PIN;
ram_rom_data(7) <= ram_rom_data_I(7) when ram_rom_data_OE(7) = '1' else 'Z'; ram_rom_data_OE(7) <= NOT rw; |
ram_rom_oe <= NOT ((rw AND phi2)); |
ram_rom_we <= NOT ((phi2short AND NOT rw)); |
rd4 <= ((use_cart_logic/cfg_mode(5) AND
use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_enable AND use_cart_logic/sic_8xxx_enable) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(3) AND NOT use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_enable2) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_enable) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(3) AND use_cart_logic/cfg_enable) OR (use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(0) AND use_cart_logic/cfg_enable) OR (use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_enable)); |
rd5 <= ((NOT use_cart_logic/cfg_mode(4) AND
use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(3) AND use_cart_logic/cfg_enable) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(3) AND NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_enable) OR (NOT use_cart_logic/cfg_mode(4) AND NOT use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(3) AND use_cart_logic/cfg_mode(0) AND use_cart_logic/cfg_enable) OR (use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_enable AND use_cart_logic/sic_axxx_enable) OR (use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_enable) OR (use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_enable AND $OpTx$FX_DC$36) OR (use_cart_logic/cfg_enable AND use_cart_logic/oss_bank(0) AND $OpTx$FX_DC$36) OR (use_cart_logic/cfg_enable AND use_cart_logic/oss_bank(1) AND $OpTx$FX_DC$36) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_enable)); |
FDCPE_reset_n_sync: FDCPE port map (reset_n_sync,reset_n_sync1,NOT phi2short,'0','0'); |
FDCPE_reset_n_sync1: FDCPE port map (reset_n_sync1,reset_n,NOT phi2short,'0','0'); |
rom_ce <= NOT (((NOT s4 AND NOT use_cart_logic/cfg_source_ram AND rw AND rd4 AND
use_cart_logic/N19/use_cart_logic/N19_D2) OR (NOT s4 AND NOT use_cart_logic/cfg_source_ram AND rd4 AND NOT mod_en AND use_cart_logic/N19/use_cart_logic/N19_D2) OR (NOT use_cart_logic/cfg_source_ram AND rw AND NOT s5 AND rd5 AND use_cart_logic/N19/use_cart_logic/N19_D2) OR (NOT use_cart_logic/cfg_source_ram AND NOT s5 AND rd5 AND NOT mod_en AND use_cart_logic/N19/use_cart_logic/N19_D2) OR (use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND NOT s4 AND NOT use_cart_logic/cfg_source_ram2 AND use_cart_logic/cfg_write_enable2 AND rd4 AND NOT use_cart_logic/N19/use_cart_logic/N19_D2) OR (NOT use_cart_logic/cfg_mode(5) AND NOT s4 AND rw AND rd4 AND NOT use_cart_logic/N19/use_cart_logic/N19_D2) OR (use_cart_logic/cfg_mode(2) AND NOT s4 AND rw AND rd4 AND NOT use_cart_logic/N19/use_cart_logic/N19_D2) OR (NOT s4 AND NOT use_cart_logic/cfg_source_ram2 AND rw AND rd4 AND NOT use_cart_logic/N19/use_cart_logic/N19_D2))); |
FDCPE_rom_reset: FDCPE port map (rom_reset,'1',NOT phi2short,'0','0',reset_n_sync); |
use_cart_logic/N145/use_cart_logic/N145_D2 <= ((adr(7) AND
use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2 AND NOT $OpTx$INV$2) OR (adr(5) AND use_cart_logic/N26/use_cart_logic/N26_D2 AND NOT $OpTx$INV$2) OR (adr(4) AND use_cart_logic/N26/use_cart_logic/N26_D2 AND NOT $OpTx$INV$2) OR (NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(3) AND use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2 AND NOT $OpTx$INV$2) OR (use_cart_logic/cfg_mode(2) AND adr(6) AND use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2) OR (NOT use_cart_logic/cfg_mode(3) AND adr(6) AND use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(3) AND use_cart_logic/N26/use_cart_logic/N26_D2 AND NOT $OpTx$FX_DC$7)); |
use_cart_logic/N19/use_cart_logic/N19_D2 <= (($OpTx$FX_DC$36)
OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1)) OR (NOT use_cart_logic/cfg_mode(4) AND NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1)) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(1)) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(3)) OR (use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(1)) OR (use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND s4)); |
use_cart_logic/N230/use_cart_logic/N230_D2 <= ((cctl)
OR (NOT adr(6) AND adr(7) AND adr(5) AND NOT adr(4))); |
use_cart_logic/N26/use_cart_logic/N26_D2 <= ((NOT use_cart_logic/cfg_mode(1) AND
use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2) OR (adr(7) AND use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2) OR (NOT use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(0) AND use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2)); |
use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2 <= (NOT use_cart_logic/cfg_mode(4) AND
use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(3) AND NOT use_cart_logic/N230/use_cart_logic/N230_D2); |
use_cart_logic/SFDecomp_1084/use_cart_logic/SFDecomp_1084_D2 <= ((NOT use_cart_logic/cfg_mode(5) AND
NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(3) AND NOT use_cart_logic/cfg_mode(0)) OR (NOT use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(3) AND use_cart_logic/cfg_mode(1)) OR (NOT use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(3) AND use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1)) OR (NOT use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(3) AND NOT use_cart_logic/cfg_mode(0) AND use_cart_logic/cfg_mode(1)) OR (NOT use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(3) AND NOT use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1))); |
FTCPE_use_cart_logic/cfg_bank213: FTCPE port map (use_cart_logic/cfg_bank2(13),use_cart_logic/cfg_bank2_T(13),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_T(13) <= ((use_cart_logic/cfg_bank2(13) AND NOT reset_n_sync) OR (use_cart_logic/cfg_bank2(13) AND adr(1) AND NOT adr(2) AND adr(0) AND NOT data(0).PIN AND $OpTx$FX_DC$6) OR (NOT use_cart_logic/cfg_bank2(13) AND adr(1) AND NOT adr(2) AND adr(0) AND data(0).PIN AND reset_n_sync AND $OpTx$FX_DC$6)); |
FTCPE_use_cart_logic/cfg_bank214: FTCPE port map (use_cart_logic/cfg_bank2(14),use_cart_logic/cfg_bank2_T(14),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_T(14) <= ((use_cart_logic/cfg_bank2(14) AND NOT reset_n_sync) OR (use_cart_logic/cfg_bank2(14) AND adr(1) AND NOT adr(2) AND adr(0) AND NOT data(1).PIN AND $OpTx$FX_DC$6) OR (NOT use_cart_logic/cfg_bank2(14) AND adr(1) AND NOT adr(2) AND adr(0) AND data(1).PIN AND reset_n_sync AND $OpTx$FX_DC$6)); |
FTCPE_use_cart_logic/cfg_bank215: FTCPE port map (use_cart_logic/cfg_bank2(15),use_cart_logic/cfg_bank2_T(15),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_T(15) <= ((use_cart_logic/cfg_bank2(15) AND NOT reset_n_sync) OR (use_cart_logic/cfg_bank2(15) AND adr(1) AND NOT adr(2) AND adr(0) AND NOT data(2).PIN AND $OpTx$FX_DC$6) OR (NOT use_cart_logic/cfg_bank2(15) AND adr(1) AND NOT adr(2) AND adr(0) AND data(2).PIN AND reset_n_sync AND $OpTx$FX_DC$6)); |
FTCPE_use_cart_logic/cfg_bank216: FTCPE port map (use_cart_logic/cfg_bank2(16),use_cart_logic/cfg_bank2_T(16),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_T(16) <= ((use_cart_logic/cfg_bank2(16) AND adr(1) AND NOT adr(2) AND adr(0) AND NOT data(3).PIN AND $OpTx$FX_DC$6) OR (NOT use_cart_logic/cfg_bank2(16) AND adr(1) AND NOT adr(2) AND adr(0) AND data(3).PIN AND reset_n_sync AND $OpTx$FX_DC$6) OR (use_cart_logic/cfg_bank2(16) AND NOT reset_n_sync)); |
FTCPE_use_cart_logic/cfg_bank217: FTCPE port map (use_cart_logic/cfg_bank2(17),use_cart_logic/cfg_bank2_T(17),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_T(17) <= ((use_cart_logic/cfg_bank2(17) AND NOT reset_n_sync) OR (use_cart_logic/cfg_bank2(17) AND adr(1) AND NOT adr(2) AND NOT data(4).PIN AND adr(0) AND $OpTx$FX_DC$6) OR (NOT use_cart_logic/cfg_bank2(17) AND adr(1) AND NOT adr(2) AND data(4).PIN AND adr(0) AND reset_n_sync AND $OpTx$FX_DC$6)); |
FTCPE_use_cart_logic/cfg_bank218: FTCPE port map (use_cart_logic/cfg_bank2(18),use_cart_logic/cfg_bank2_T(18),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_T(18) <= ((use_cart_logic/cfg_bank2(18) AND NOT reset_n_sync) OR (use_cart_logic/cfg_bank2(18) AND adr(1) AND NOT adr(2) AND adr(0) AND NOT data(5).PIN AND $OpTx$FX_DC$6) OR (NOT use_cart_logic/cfg_bank2(18) AND adr(1) AND NOT adr(2) AND adr(0) AND data(5).PIN AND reset_n_sync AND $OpTx$FX_DC$6)); |
FTCPE_use_cart_logic/cfg_bank219: FTCPE port map (use_cart_logic/cfg_bank2(19),use_cart_logic/cfg_bank2_T(19),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_T(19) <= ((use_cart_logic/cfg_bank2(19) AND NOT reset_n_sync) OR (use_cart_logic/cfg_bank2(19) AND adr(1) AND NOT adr(2) AND NOT data(6).PIN AND adr(0) AND $OpTx$FX_DC$6) OR (NOT use_cart_logic/cfg_bank2(19) AND adr(1) AND NOT adr(2) AND data(6).PIN AND adr(0) AND reset_n_sync AND $OpTx$FX_DC$6)); |
FTCPE_use_cart_logic/cfg_bank220: FTCPE port map (use_cart_logic/cfg_bank2(20),use_cart_logic/cfg_bank2_T(20),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_T(20) <= ((use_cart_logic/cfg_bank2(20) AND NOT reset_n_sync) OR (use_cart_logic/cfg_bank2(20) AND adr(1) AND NOT adr(2) AND adr(0) AND NOT data(7).PIN AND $OpTx$FX_DC$6) OR (NOT use_cart_logic/cfg_bank2(20) AND adr(1) AND NOT adr(2) AND adr(0) AND data(7).PIN AND reset_n_sync AND $OpTx$FX_DC$6)); |
FDCPE_use_cart_logic/cfg_bank221: FDCPE port map (use_cart_logic/cfg_bank2(21),use_cart_logic/cfg_bank2_D(21),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_D(21) <= ((use_cart_logic/cfg_bank2(21) AND adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(21) AND NOT adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(21) AND adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(21) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND NOT adr(1) AND NOT adr(0) AND NOT cctl AND data(0).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2)); |
FDCPE_use_cart_logic/cfg_bank222: FDCPE port map (use_cart_logic/cfg_bank2(22),use_cart_logic/cfg_bank2_D(22),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_D(22) <= ((use_cart_logic/cfg_bank2(22) AND adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(22) AND NOT adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(22) AND adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(22) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND NOT adr(1) AND NOT adr(0) AND NOT cctl AND data(1).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2)); |
FDCPE_use_cart_logic/cfg_bank223: FDCPE port map (use_cart_logic/cfg_bank2(23),use_cart_logic/cfg_bank2_D(23),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_D(23) <= ((use_cart_logic/cfg_bank2(23) AND adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(23) AND NOT adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(23) AND adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(23) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND NOT adr(1) AND NOT adr(0) AND data(2).PIN AND NOT cctl AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2)); |
FDCPE_use_cart_logic/cfg_bank224: FDCPE port map (use_cart_logic/cfg_bank2(24),use_cart_logic/cfg_bank2_D(24),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_D(24) <= ((use_cart_logic/cfg_bank2(24) AND adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(24) AND adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(24) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND NOT adr(1) AND NOT adr(0) AND NOT cctl AND data(3).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_bank2(24) AND NOT adr(2) AND reset_n_sync)); |
FDCPE_use_cart_logic/cfg_bank225: FDCPE port map (use_cart_logic/cfg_bank2(25),use_cart_logic/cfg_bank2_D(25),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_D(25) <= ((use_cart_logic/cfg_bank2(25) AND adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(25) AND adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(25) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND NOT adr(1) AND data(4).PIN AND NOT adr(0) AND NOT cctl AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_bank2(25) AND NOT adr(2) AND reset_n_sync)); |
FDCPE_use_cart_logic/cfg_bank226: FDCPE port map (use_cart_logic/cfg_bank2(26),use_cart_logic/cfg_bank2_D(26),NOT phi2short,'0','0');
use_cart_logic/cfg_bank2_D(26) <= ((use_cart_logic/cfg_bank2(26) AND adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(26) AND adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_bank2(26) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND NOT adr(1) AND NOT adr(0) AND NOT cctl AND data(5).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_bank2(26) AND NOT adr(2) AND reset_n_sync)); |
FDCPE_use_cart_logic/cfg_bank13: FDCPE port map (use_cart_logic/cfg_bank(13),use_cart_logic/cfg_bank_D(13),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(13) <= (($OpTx$BIN_STEP$349) OR (use_cart_logic/cfg_mode(4) AND NOT use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_bank(13) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_mode(5) AND $OpTx$FX_DC$33) OR (use_cart_logic/cfg_bank(13) AND cctl AND reset_n_sync) OR (use_cart_logic/cfg_bank(13) AND reset_n_sync AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_bank(13) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND $OpTx$FX_DC$23)); |
FDCPE_use_cart_logic/cfg_bank14: FDCPE port map (use_cart_logic/cfg_bank(14),use_cart_logic/cfg_bank_D(14),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(14) <= ((use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND NOT rw AND data(1).PIN AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT $OpTx$FX_DC$23) OR (NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(3) AND NOT adr(1) AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND $OpTx$INV$2) OR (NOT use_cart_logic/cfg_mode(1) AND NOT rw AND data(1).PIN AND reset_n_sync AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND $OpTx$FX_DC$7 AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2) OR (rom_ce_OBUF.EXP) OR (use_cart_logic/cfg_mode(1) AND NOT rw AND data(0).PIN AND reset_n_sync AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2) OR (NOT rw AND data(0).PIN AND reset_n_sync AND NOT $OpTx$FX_DC$7 AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2) OR (NOT use_cart_logic/cfg_mode(0) AND adr(0) AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_bank(14) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND $OpTx$FX_DC$7 AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2) OR (NOT rw AND NOT cctl AND data(1).PIN AND reset_n_sync AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/N145/use_cart_logic/N145_D2) OR (use_cart_logic/cfg_bank(14) AND $OpTx$FX_SC$112) OR (use_cart_logic/cfg_bank(14) AND $OpTx$FX_DC$107) OR (adr(1) AND reset_n_sync AND $OpTx$FX_DC$36 AND $OpTx$FX_DC$30) OR (use_cart_logic/cfg_bank(14) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2 AND $OpTx$FX_DC$23) OR (NOT rw AND NOT cctl AND data(0).PIN AND reset_n_sync AND use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2)); |
FDCPE_use_cart_logic/cfg_bank15: FDCPE port map (use_cart_logic/cfg_bank(15),use_cart_logic/cfg_bank_D(15),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(15) <= ((use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_bank(15) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (NOT use_cart_logic/cfg_mode(0) AND adr(1) AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_bank(15) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2 AND $OpTx$FX_DC$7) OR (NOT rw AND data(2).PIN AND NOT cctl AND reset_n_sync AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/N145/use_cart_logic/N145_D2) OR (NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(3) AND NOT adr(2) AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND $OpTx$INV$2) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(1) AND NOT rw AND data(2).PIN AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT $OpTx$FX_DC$7) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(3) AND NOT rw AND data(1).PIN AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(3) AND use_cart_logic/cfg_mode(1) AND NOT rw AND data(1).PIN AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(1) AND NOT rw AND data(2).PIN AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(3) AND NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_bank(15) AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_bank(15) AND $OpTx$FX_SC$112) OR (use_cart_logic/cfg_bank(15) AND $OpTx$FX_DC$107) OR (data(2).PIN AND $OpTx$FX_DC$70) OR (adr(2) AND reset_n_sync AND $OpTx$FX_DC$36 AND $OpTx$FX_DC$30) OR (NOT rw AND NOT cctl AND data(1).PIN AND reset_n_sync AND use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2)); |
FDCPE_use_cart_logic/cfg_bank16: FDCPE port map (use_cart_logic/cfg_bank(16),use_cart_logic/cfg_bank_D(16),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(16) <= (($OpTx$BIN_OR$350) OR (use_cart_logic/cfg_mode(4) AND NOT use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_bank(16) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_mode(2) AND NOT rw AND data(2).PIN AND reset_n_sync AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2) OR (NOT use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_bank(16) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_bank(16) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(3) AND use_cart_logic/cfg_bank(16) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND $OpTx$FX_DC$7) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_bank(16) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_mode(3) AND NOT rw AND NOT cctl AND data(3).PIN AND reset_n_sync AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND $OpTx$FX_DC$7) OR (adr(7) AND NOT rw AND NOT cctl AND data(3).PIN AND reset_n_sync AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(1) AND NOT rw AND data(3).PIN AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2) OR (use_cart_logic/cfg_bank(16) AND $OpTx$FX_SC$112) OR (data(3).PIN AND $OpTx$FX_DC$70) OR (use_cart_logic/cfg_bank(16) AND adr(7) AND $OpTx$FX_DC$35) OR (use_cart_logic/cfg_bank(16) AND reset_n_sync AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2)); |
FDCPE_use_cart_logic/cfg_bank17: FDCPE port map (use_cart_logic/cfg_bank(17),use_cart_logic/cfg_bank_D(17),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(17) <= ((NOT use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_bank(17) AND reset_n_sync AND NOT $OpTx$FX_DC$36 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (NOT use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_bank(17) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_bank(17) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (use_cart_logic/cfg_mode(0) AND NOT cctl AND adr(4) AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(0) AND adr(3) AND NOT cctl AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2) OR (use_cart_logic/cfg_bank(17) AND reset_n_sync AND NOT $OpTx$FX_DC$36 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_bank(17) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (use_cart_logic/cfg_mode(4) AND NOT use_cart_logic/cfg_mode(0) AND use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_bank(17) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_bank(17) AND reset_n_sync AND NOT $OpTx$FX_DC$36 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND NOT use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(0) AND use_cart_logic/cfg_mode(1) AND NOT rw AND data(4).PIN AND NOT cctl AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (use_cart_logic/cfg_bank(17) AND $OpTx$FX_SC$112) OR (data(4).PIN AND $OpTx$FX_DC$84) OR (use_cart_logic/cfg_bank(17) AND use_cart_logic/N26/use_cart_logic/N26_D2 AND $OpTx$FX_DC$35) OR (use_cart_logic/cfg_mode(2) AND NOT rw AND NOT cctl AND data(3).PIN AND reset_n_sync AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2) OR (NOT rw AND NOT cctl AND data(3).PIN AND reset_n_sync AND NOT $OpTx$FX_DC$36 AND use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2)); |
FDCPE_use_cart_logic/cfg_bank18: FDCPE port map (use_cart_logic/cfg_bank(18),use_cart_logic/cfg_bank_D(18),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(18) <= ((use_cart_logic/cfg_mode(0) AND adr(5) AND NOT cctl AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(0) AND NOT cctl AND adr(4) AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2) OR (use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(0) AND NOT rw AND data(4).PIN AND NOT cctl AND reset_n_sync AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2) OR (use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(1) AND NOT rw AND data(4).PIN AND NOT cctl AND reset_n_sync AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2) OR (NOT use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_bank(18) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (NOT use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1) AND NOT rw AND NOT cctl AND data(5).PIN AND reset_n_sync AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (use_cart_logic/cfg_bank(18) AND $OpTx$FX_SC$112) OR (data(5).PIN AND $OpTx$FX_DC$84) OR (use_cart_logic/cfg_bank(18) AND use_cart_logic/N26/use_cart_logic/N26_D2 AND $OpTx$FX_DC$35) OR (use_cart_logic/cfg_bank(18) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2 AND NOT $OpTx$FX_DC$71) OR (NOT rw AND data(4).PIN AND NOT cctl AND reset_n_sync AND NOT $OpTx$FX_DC$36 AND use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2)); |
FDCPE_use_cart_logic/cfg_bank19: FDCPE port map (use_cart_logic/cfg_bank(19),use_cart_logic/cfg_bank_D(19),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(19) <= ((use_cart_logic/cfg_mode(4) AND NOT use_cart_logic/cfg_mode(0) AND use_cart_logic/cfg_bank(19) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_mode(0) AND adr(6) AND NOT cctl AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(0) AND adr(5) AND NOT cctl AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT rw AND data(6).PIN AND NOT cctl AND reset_n_sync AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(1) AND NOT rw AND data(6).PIN AND NOT cctl AND reset_n_sync AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(1) AND NOT rw AND NOT cctl AND data(5).PIN AND reset_n_sync AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2) OR (NOT use_cart_logic/cfg_mode(2) AND NOT rw AND data(6).PIN AND NOT cctl AND reset_n_sync AND NOT $OpTx$FX_DC$36 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (NOT rw AND data(6).PIN AND NOT cctl AND reset_n_sync AND NOT $OpTx$FX_DC$36 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1) AND NOT rw AND data(6).PIN AND NOT cctl AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2) OR (use_cart_logic/cfg_bank(19) AND $OpTx$FX_SC$112) OR (use_cart_logic/cfg_bank(19) AND rw AND reset_n_sync AND use_cart_logic/N26/use_cart_logic/N26_D2) OR (use_cart_logic/cfg_bank(19) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/N26/use_cart_logic/N26_D2) OR (use_cart_logic/cfg_bank(19) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT $OpTx$FX_DC$71) OR (NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_bank(19) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2)); |
FDCPE_use_cart_logic/cfg_bank20: FDCPE port map (use_cart_logic/cfg_bank(20),use_cart_logic/cfg_bank_D(20),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(20) <= ((NOT use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_bank(20) AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (NOT use_cart_logic/cfg_mode(0) AND adr(6) AND NOT cctl AND reset_n_sync AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT rw AND data(6).PIN AND NOT cctl AND reset_n_sync AND NOT $OpTx$FX_DC$36 AND $OpTx$FX_DC$124) OR (NOT rw AND NOT cctl AND data(7).PIN AND reset_n_sync AND NOT $OpTx$FX_DC$36 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT $OpTx$FX_DC$124) OR (NOT use_cart_logic/cfg_mode(4) AND NOT rw AND NOT cctl AND data(7).PIN AND reset_n_sync AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(5) AND NOT rw AND NOT cctl AND data(7).PIN AND reset_n_sync AND $OpTx$FX_DC$36 AND use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2) OR (use_cart_logic/cfg_bank(20) AND $OpTx$FX_SC$112) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_bank(20) AND rw AND reset_n_sync AND use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_bank(20) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND use_cart_logic/N26/use_cart_logic/N26_D2) OR (NOT use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_bank(20) AND rw AND reset_n_sync AND $OpTx$FX_DC$36) OR (use_cart_logic/cfg_bank(20) AND reset_n_sync AND NOT $OpTx$FX_DC$36 AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND NOT $OpTx$FX_DC$124)); |
FDCPE_use_cart_logic/cfg_bank21: FDCPE port map (use_cart_logic/cfg_bank(21),use_cart_logic/cfg_bank_D(21),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(21) <= ((use_cart_logic/cfg_bank(21) AND adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_bank(21) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND NOT adr(1) AND NOT adr(2) AND adr(0) AND NOT cctl AND data(0).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT adr(3) AND NOT adr(2) AND adr(0) AND NOT cctl AND data(0).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT $OpTx$FX_DC$6) OR (use_cart_logic/cfg_bank(21) AND adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_bank(21) AND NOT adr(0) AND reset_n_sync)); |
FDCPE_use_cart_logic/cfg_bank22: FDCPE port map (use_cart_logic/cfg_bank(22),use_cart_logic/cfg_bank_D(22),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(22) <= ((NOT adr(3) AND NOT adr(1) AND NOT adr(2) AND adr(0) AND NOT cctl AND data(1).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT adr(3) AND NOT adr(2) AND adr(0) AND NOT cctl AND data(1).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT $OpTx$FX_DC$6) OR (use_cart_logic/cfg_bank(22) AND adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_bank(22) AND adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_bank(22) AND NOT adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_bank(22) AND reset_n_sync AND NOT $OpTx$FX_DC$6)); |
FDCPE_use_cart_logic/cfg_bank23: FDCPE port map (use_cart_logic/cfg_bank(23),use_cart_logic/cfg_bank_D(23),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(23) <= ((NOT adr(3) AND NOT adr(1) AND NOT adr(2) AND adr(0) AND data(2).PIN AND NOT cctl AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT adr(3) AND NOT adr(2) AND adr(0) AND data(2).PIN AND NOT cctl AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT $OpTx$FX_DC$6) OR (use_cart_logic/cfg_bank(23) AND adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_bank(23) AND adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_bank(23) AND NOT adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_bank(23) AND reset_n_sync AND NOT $OpTx$FX_DC$6)); |
FDCPE_use_cart_logic/cfg_bank24: FDCPE port map (use_cart_logic/cfg_bank(24),use_cart_logic/cfg_bank_D(24),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(24) <= ((use_cart_logic/cfg_bank(24) AND adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_bank(24) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND NOT adr(1) AND NOT adr(2) AND adr(0) AND NOT cctl AND data(3).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT adr(3) AND NOT adr(2) AND adr(0) AND NOT cctl AND data(3).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT $OpTx$FX_DC$6) OR (use_cart_logic/cfg_bank(24) AND adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_bank(24) AND NOT adr(0) AND reset_n_sync)); |
FDCPE_use_cart_logic/cfg_bank25: FDCPE port map (use_cart_logic/cfg_bank(25),use_cart_logic/cfg_bank_D(25),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(25) <= ((use_cart_logic/cfg_bank(25) AND adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_bank(25) AND adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_bank(25) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND NOT adr(1) AND NOT adr(2) AND data(4).PIN AND adr(0) AND NOT cctl AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT adr(3) AND NOT adr(2) AND data(4).PIN AND adr(0) AND NOT cctl AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT $OpTx$FX_DC$6) OR (use_cart_logic/cfg_bank(25) AND NOT adr(0) AND reset_n_sync)); |
FDCPE_use_cart_logic/cfg_bank26: FDCPE port map (use_cart_logic/cfg_bank(26),use_cart_logic/cfg_bank_D(26),NOT phi2short,'0','0');
use_cart_logic/cfg_bank_D(26) <= ((NOT adr(3) AND NOT adr(2) AND adr(0) AND NOT cctl AND data(5).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT $OpTx$FX_DC$6) OR (use_cart_logic/cfg_bank(26) AND adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_bank(26) AND adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_bank(26) AND NOT adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_bank(26) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND NOT adr(1) AND NOT adr(2) AND adr(0) AND NOT cctl AND data(5).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2)); |
use_cart_logic/cfg_bank_13_and0008/use_cart_logic/cfg_bank_13_and0008_D2 <= (NOT use_cart_logic/cfg_mode(4) AND
use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(3) AND NOT use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1) AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/SFDecomp_1040/use_cart_logic/SFDecomp_1040_D2); |
use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 <= (NOT adr(6) AND NOT adr(3) AND adr(7) AND adr(5) AND NOT adr(1) AND
NOT adr(2) AND NOT adr(0) AND NOT adr(4)); |
use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2 <= (NOT use_cart_logic/cfg_mode(4) AND
use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(3) AND NOT use_cart_logic/cfg_mode(0) AND NOT use_cart_logic/cfg_mode(1) AND NOT adr(7) AND $OpTx$FX_DC$22); |
FDCPE_use_cart_logic/cfg_enable: FDCPE port map (use_cart_logic/cfg_enable,use_cart_logic/cfg_enable_D,NOT phi2short,'0','0');
use_cart_logic/cfg_enable_D <= ((NOT reset_n_sync) OR (NOT use_cart_logic/cfg_mode(1) AND use_cart_logic/cfg_enable AND rw AND use_cart_logic/N145/use_cart_logic/N145_D2) OR (NOT rw AND NOT cctl AND NOT data(7).PIN AND use_cart_logic/cfg_bank_13_and0008/use_cart_logic/cfg_bank_13_and0008_D2) OR (NOT use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_enable AND rw AND NOT $OpTx$INV$2 AND NOT $OpTx$FX_DC$56) OR (NOT use_cart_logic/cfg_mode(3) AND NOT use_cart_logic/cfg_mode(1) AND NOT rw AND NOT cctl AND NOT $OpTx$INV$3) OR (NOT rw AND NOT cctl AND NOT $OpTx$FX_DC$36 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT $OpTx$INV$3) OR (use_cart_logic/cfg_mode(4) AND NOT use_cart_logic/cfg_mode(3) AND NOT rw AND NOT cctl AND NOT $OpTx$INV$3) OR (use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(3) AND NOT rw AND NOT cctl AND NOT $OpTx$INV$3) OR (use_cart_logic/cfg_mode(5) AND use_cart_logic/cfg_mode(3) AND NOT rw AND NOT cctl AND NOT data(7).PIN AND NOT use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT use_cart_logic/cfg_mode(5) AND NOT rw AND NOT cctl AND NOT $OpTx$FX_DC$36 AND NOT $OpTx$INV$3 AND NOT use_cart_logic/cfg_bank_13_and0008/use_cart_logic/cfg_bank_13_and0008_D2) OR (NOT use_cart_logic/cfg_mode(5) AND NOT rw AND NOT cctl AND use_cart_logic/N145/use_cart_logic/N145_D2 AND NOT $OpTx$INV$2 AND NOT $OpTx$INV$3 AND NOT $OpTx$FX_DC$56) OR (use_cart_logic/cfg_enable AND cctl) OR (use_cart_logic/cfg_enable AND rw AND NOT $OpTx$FX_DC$36) OR (NOT cctl AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N145/use_cart_logic/N145_D2 AND NOT $OpTx$FX_DC$137) OR (NOT cctl AND use_cart_logic/N145/use_cart_logic/N145_D2 AND NOT $OpTx$FX_DC$42 AND $OpTx$FX_DC$158)); |
FDCPE_use_cart_logic/cfg_enable2: FDCPE port map (use_cart_logic/cfg_enable2,use_cart_logic/cfg_enable2_D,NOT phi2short,'0','0');
use_cart_logic/cfg_enable2_D <= ((use_cart_logic/cfg_enable2 AND adr(1) AND reset_n_sync) OR (adr(1) AND NOT adr(2) AND adr(0) AND reset_n_sync AND $OpTx$FX_DC$6) OR (NOT adr(1) AND adr(2) AND data(0).PIN AND reset_n_sync AND $OpTx$FX_DC$6) OR (use_cart_logic/cfg_enable2 AND NOT adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_enable2 AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(1) AND NOT adr(0) AND reset_n_sync AND NOT use_cart_logic/cfg_bank_13_cmp_eq0005/use_cart_logic/cfg_bank_13_cmp_eq0005_D2 AND $OpTx$FX_DC$6)); |
FDCPE_use_cart_logic/cfg_mode0: FDCPE port map (use_cart_logic/cfg_mode(0),use_cart_logic/cfg_mode_D(0),NOT phi2short,'0','0');
use_cart_logic/cfg_mode_D(0) <= ((NOT reset_n_sync) OR (use_cart_logic/cfg_mode(0) AND NOT adr(1)) OR (use_cart_logic/cfg_mode(0) AND NOT adr(2)) OR (use_cart_logic/cfg_mode(0) AND adr(0)) OR (use_cart_logic/cfg_mode(0) AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND adr(1) AND adr(2) AND NOT adr(0) AND NOT cctl AND data(0).PIN AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2)); |
FDCPE_use_cart_logic/cfg_mode1: FDCPE port map (use_cart_logic/cfg_mode(1),use_cart_logic/cfg_mode_D(1),NOT phi2short,'0','0');
use_cart_logic/cfg_mode_D(1) <= ((use_cart_logic/cfg_mode(1) AND adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_mode(1) AND NOT adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_mode(1) AND NOT adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_mode(1) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND adr(1) AND adr(2) AND NOT adr(0) AND NOT cctl AND data(1).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2)); |
FDCPE_use_cart_logic/cfg_mode2: FDCPE port map (use_cart_logic/cfg_mode(2),use_cart_logic/cfg_mode_D(2),NOT phi2short,'0','0');
use_cart_logic/cfg_mode_D(2) <= ((use_cart_logic/cfg_mode(2) AND NOT adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_mode(2) AND adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_mode(2) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND adr(1) AND adr(2) AND NOT adr(0) AND data(2).PIN AND NOT cctl AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (use_cart_logic/cfg_mode(2) AND NOT adr(1) AND reset_n_sync)); |
FDCPE_use_cart_logic/cfg_mode3: FDCPE port map (use_cart_logic/cfg_mode(3),use_cart_logic/cfg_mode_D(3),NOT phi2short,'0','0');
use_cart_logic/cfg_mode_D(3) <= ((use_cart_logic/cfg_mode(3) AND NOT adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_mode(3) AND adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_mode(3) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND adr(1) AND adr(2) AND NOT adr(0) AND NOT cctl AND data(3).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (use_cart_logic/cfg_mode(3) AND NOT adr(1) AND reset_n_sync)); |
FDCPE_use_cart_logic/cfg_mode4: FDCPE port map (use_cart_logic/cfg_mode(4),use_cart_logic/cfg_mode_D(4),NOT phi2short,'0','0');
use_cart_logic/cfg_mode_D(4) <= ((use_cart_logic/cfg_mode(4) AND adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_mode(4) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND adr(1) AND adr(2) AND data(4).PIN AND NOT adr(0) AND NOT cctl AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (use_cart_logic/cfg_mode(4) AND NOT adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_mode(4) AND NOT adr(2) AND reset_n_sync)); |
FDCPE_use_cart_logic/cfg_mode5: FDCPE port map (use_cart_logic/cfg_mode(5),use_cart_logic/cfg_mode_D(5),NOT phi2short,'0','0');
use_cart_logic/cfg_mode_D(5) <= ((use_cart_logic/cfg_mode(5) AND adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_mode(5) AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND adr(1) AND adr(2) AND NOT adr(0) AND NOT cctl AND data(5).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (use_cart_logic/cfg_mode(5) AND NOT adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_mode(5) AND NOT adr(2) AND reset_n_sync)); |
FDCPE_use_cart_logic/cfg_source_ram: FDCPE port map (use_cart_logic/cfg_source_ram,use_cart_logic/cfg_source_ram_D,NOT phi2short,'0','0');
use_cart_logic/cfg_source_ram_D <= ((use_cart_logic/cfg_source_ram AND NOT adr(2) AND reset_n_sync) OR (NOT adr(3) AND adr(1) AND adr(2) AND adr(0) AND NOT cctl AND data(1).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT adr(3) AND adr(1) AND adr(0) AND NOT cctl AND data(1).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT $OpTx$FX_DC$6) OR (use_cart_logic/cfg_source_ram AND NOT adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_source_ram AND NOT adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_source_ram AND reset_n_sync AND NOT $OpTx$FX_DC$6)); |
FDCPE_use_cart_logic/cfg_source_ram2: FDCPE port map (use_cart_logic/cfg_source_ram2,use_cart_logic/cfg_source_ram2_D,NOT phi2short,'0','0');
use_cart_logic/cfg_source_ram2_D <= ((NOT adr(3) AND adr(1) AND adr(2) AND adr(0) AND NOT cctl AND data(3).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT adr(3) AND adr(1) AND adr(0) AND NOT cctl AND data(3).PIN AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT $OpTx$FX_DC$6) OR (use_cart_logic/cfg_source_ram2 AND NOT adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_source_ram2 AND NOT adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_source_ram2 AND NOT adr(0) AND reset_n_sync) OR (use_cart_logic/cfg_source_ram2 AND reset_n_sync AND NOT $OpTx$FX_DC$6)); |
FDCPE_use_cart_logic/cfg_write_enable2: FDCPE port map (use_cart_logic/cfg_write_enable2,use_cart_logic/cfg_write_enable2_D,NOT phi2short,'0','0');
use_cart_logic/cfg_write_enable2_D <= ((use_cart_logic/cfg_write_enable2 AND NOT adr(2) AND reset_n_sync) OR (use_cart_logic/cfg_write_enable2 AND reset_n_sync AND NOT $OpTx$FX_DC$6) OR (NOT adr(3) AND adr(1) AND adr(2) AND adr(0) AND data(2).PIN AND NOT cctl AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2) OR (NOT adr(3) AND adr(1) AND adr(0) AND data(2).PIN AND NOT cctl AND reset_n_sync AND NOT data_or0000/data_or0000_D2 AND use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT $OpTx$FX_DC$6) OR (use_cart_logic/cfg_write_enable2 AND NOT adr(1) AND reset_n_sync) OR (use_cart_logic/cfg_write_enable2 AND NOT adr(0) AND reset_n_sync)); |
FTCPE_use_cart_logic/oss_bank0: FTCPE port map (use_cart_logic/oss_bank(0),use_cart_logic/oss_bank_T(0),NOT phi2short,'0','0');
use_cart_logic/oss_bank_T(0) <= ((use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(3) AND NOT use_cart_logic/cfg_mode(0) AND NOT adr(7) AND use_cart_logic/oss_bank(0) AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND $OpTx$FX_DC$22) OR (use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(0) AND NOT adr(7) AND use_cart_logic/oss_bank(0) AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2 AND $OpTx$FX_DC$22) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(3) AND NOT adr(3) AND NOT adr(7) AND NOT use_cart_logic/oss_bank(0) AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND use_cart_logic/N26/use_cart_logic/N26_D2 AND $OpTx$FX_DC$22) OR (use_cart_logic/oss_bank(0) AND NOT reset_n_sync) OR (use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(0) AND NOT adr(7) AND use_cart_logic/oss_bank(0) AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND $OpTx$FX_DC$22) OR (use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(0) AND adr(3) AND NOT adr(7) AND use_cart_logic/oss_bank(0) AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND $OpTx$FX_DC$22)); |
FTCPE_use_cart_logic/oss_bank1: FTCPE port map (use_cart_logic/oss_bank(1),use_cart_logic/oss_bank_T(1),NOT phi2short,'0','0');
use_cart_logic/oss_bank_T(1) <= ((use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(0) AND NOT adr(7) AND use_cart_logic/oss_bank(1) AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND $OpTx$FX_DC$22) OR (use_cart_logic/cfg_mode(2) AND use_cart_logic/cfg_mode(3) AND NOT use_cart_logic/cfg_mode(0) AND NOT adr(7) AND use_cart_logic/oss_bank(1) AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND $OpTx$FX_DC$22) OR (use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(0) AND NOT adr(7) AND use_cart_logic/oss_bank(1) AND NOT adr(0) AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND $OpTx$FX_DC$22) OR (use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(0) AND NOT adr(7) AND use_cart_logic/oss_bank(1) AND $OpTx$FX_DC$36 AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND NOT use_cart_logic/N26/use_cart_logic/N26_D2 AND $OpTx$FX_DC$22) OR (NOT use_cart_logic/cfg_mode(4) AND use_cart_logic/cfg_mode(2) AND NOT use_cart_logic/cfg_mode(3) AND NOT adr(7) AND NOT use_cart_logic/oss_bank(1) AND adr(0) AND reset_n_sync AND NOT use_cart_logic/N230/use_cart_logic/N230_D2 AND use_cart_logic/N26/use_cart_logic/N26_D2 AND $OpTx$FX_DC$22) OR (use_cart_logic/oss_bank(1) AND NOT reset_n_sync)); |
FTCPE_use_cart_logic/sic_8xxx_enable: FTCPE port map (use_cart_logic/sic_8xxx_enable,use_cart_logic/sic_8xxx_enable_T,NOT phi2short,'0','0');
use_cart_logic/sic_8xxx_enable_T <= ((use_cart_logic/sic_8xxx_enable AND NOT reset_n_sync) OR (use_cart_logic/sic_8xxx_enable AND NOT rw AND NOT cctl AND NOT data(5).PIN AND use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (NOT use_cart_logic/sic_8xxx_enable AND NOT rw AND NOT cctl AND data(5).PIN AND reset_n_sync AND use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2)); |
FTCPE_use_cart_logic/sic_axxx_enable: FTCPE port map (use_cart_logic/sic_axxx_enable,use_cart_logic/sic_axxx_enable_T,NOT phi2short,'0','0');
use_cart_logic/sic_axxx_enable_T <= ((NOT use_cart_logic/sic_axxx_enable AND NOT reset_n_sync) OR (NOT use_cart_logic/sic_axxx_enable AND NOT rw AND NOT data(6).PIN AND NOT cctl AND use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2) OR (use_cart_logic/sic_axxx_enable AND NOT rw AND data(6).PIN AND NOT cctl AND reset_n_sync AND use_cart_logic/cfg_bank_14_and0000/use_cart_logic/cfg_bank_14_and0000_D2)); |
Register Legend:
FDCPE (Q,D,C,CLR,PRE,CE); FTCPE (Q,D,C,CLR,PRE,CE); LDCP (Q,D,G,CLR,PRE); |