Signal Name Total Product Terms Product Terms Location Power Mode Pin Number PinType Pin Use
sic_axxx_enable 2  1_1 1_2 MC1 LOW   (b) (b)
ram_rom_data<5> 2  2_1 2_2 MC2 LOW 35 I/O I/O
sic_8xxx_enable 2  3_1 3_2 MC3 LOW   (b) (b)
cfg_bank2<23> 2  4_1 4_2 MC4 LOW   (b) (b)
ram_rom_data<4> 2  5_1 5_2 MC5 LOW 36 I/O I/O
ram_rom_data<3> 2  6_1 6_2 MC6 LOW 37 I/O I/O
cfg_bank2<22> 2  7_1 7_2 MC7 LOW   (b) (b)
ram_rom_data<2> 2  8_1 8_2 MC8 LOW 39 I/O I/O
ram_rom_data<1> 2  9_1 9_2 MC9 LOW 40 I/O I/O
cfg_bank2<20> 2  10_1 10_2 MC10 LOW   (b) (b)
ram_rom_data<0> 2  11_1 11_2 MC11 LOW 41 I/O I/O
ram_rom_oe 1  12_1 MC12 LOW 42 I/O O
cfg_bank2<19> 2  13_1 13_2 MC13 LOW   (b) (b)
ram_rom_adr<1> 1  14_1 MC14 LOW 43 I/O O
cfg_bank2<18> 2  15_1 15_2 MC15 LOW 46 I/O (b)
cfg_bank2<17> 2  16_1 16_2 MC16 LOW   (b) (b)
rom_ce 3  17_1 17_2 17_3 MC17 LOW 49 I/O O
cfg_bank2<16> 2  18_1 18_2 MC18 LOW   (b) (b)

Signals Used By Logic in Function Block
  1. adr<1>
  2. cfg_bank2<16>
  3. cfg_bank2<17>
  4. cfg_bank2<18>
  5. cfg_bank2<19>
  6. cfg_bank2<20>
  7. cfg_bank2<22>
  8. cfg_bank2<23>
  9. cfg_source_ram
  10. cfg_source_ram2
  11. do_access_mux0002/do_access_mux0002_D2
  12. phi2
  13. data<0>.PIN
  14. data<1>.PIN
  15. data<2>.PIN
  16. data<3>.PIN
  17. data<4>.PIN
  18. data<5>.PIN
  19. data<6>.PIN
  20. data<7>.PIN
  21. reset_n_sync
  22. rw
  23. sic_8xxx_enable
  24. sic_axxx_enable
  25. use_cart_logic/N16/use_cart_logic/N16_D2
  26. use_cart_logic/N23/use_cart_logic/N23_D2
  27. use_cart_logic/cfg_bank2_13__or0000/use_cart_logic/cfg_bank2_13__or0000_D2
  28. use_cart_logic/cfg_bank2_21__or0000/use_cart_logic/cfg_bank2_21__or0000_D2
  29. use_cart_logic/sic_8xxx_enable__or0000/use_cart_logic/sic_8xxx_enable__or0000_D2